Samsung Electronics and AMD have signed a Memorandum of Understanding (MoU) to expand their strategic collaboration on next-generation AI memory and computing technologies.
The agreement focuses on advancing high-bandwidth memory (HBM), next-generation DRAM solutions and integrated AI infrastructure to support increasingly demanding data centre and AI workloads.
Focus on HBM4 and next-generation AI infrastructure
Under the collaboration, Samsung will align on the supply of HBM4 memory for AMD’s upcoming AI accelerator, the AMD Instinct MI455X GPU, while also working on advanced DDR5 memory solutions for AMD’s next-generation EPYC processors, codenamed “Venice”.
These technologies are expected to support integrated AI systems combining GPUs, CPUs and rack-scale architectures such as the AMD Helios platform. The collaboration reflects growing demand for higher memory bandwidth and improved power efficiency in AI-driven computing environments.
Samsung’s HBM4, built on its latest DRAM process technology, is designed to deliver high-speed data processing and increased bandwidth, enabling improved performance for AI model training and inference workloads.
Strengthening system-level integration for AI workloads
The partnership also highlights the importance of system-level integration across the computing stack, from silicon and memory to full-scale infrastructure in accelerating AI innovation.
In addition to memory collaboration, the companies are exploring opportunities for deeper engagement in semiconductor manufacturing, including potential foundry services for future AMD products.
Industry observers note that as AI workloads scale, tight integration between compute and memory technologies is becoming critical to delivering performance, efficiency and scalability across data centre environments.
Building on long-term collaboration
Samsung and AMD have collaborated for nearly two decades across graphics, mobile and computing technologies. Samsung has previously served as a key partner for AMD’s HBM3E memory, used in its recent AI accelerators.
The expanded agreement reflects a broader industry trend towards closer collaboration between semiconductor and memory providers to support the next phase of AI infrastructure development, where performance, energy efficiency and scalability are central to enterprise and hyperscale deployments.